1. Field of the Invention
The present invention relates to a method of producing a bonded wafer by bonding a wafer for an active layer and a wafer for a substrate without interposing an insulation film in between, and thinning the wafer for the active layer.
Priority is claimed on Japanese Patent Application No. 2006-251252, filed Sep. 15, 2006, the content of which is incorporated herein by reference.
2. Description of Related Art
In general a bonded wafer denotes an SOI (Silicon On Insulator) wafer. For example, the below described methods are disclosed as methods of producing a bonded wafer. In a method (grinding-polishing method) described in Non Patent Reference 1 (Science of silicon, edited by UCS semiconductor basic technology workshop, Realize Inc., Jun. 28, 1996, p 459-462), after bonding a non-oxidized wafer for a substrate and an oxidized wafer for an active layer, the oxidized wafer for the active layer is made into a thin film of a predetermined thickness by grinding and polishing the surface of the wafer. An ion implantation separation method described in Patent Reference 1 (Japanese Unexamined Patent Application, First Publication, No. H5-21128) comprises a step of forming an ion-implanted layer by implanting light element ions such as H2 ions or He ions to a predetermined depth in the wafer for an active layer, a step of bonding the wafer for the active layer and the wafer for the substrate interposing an insulation film in between, a step of delaminating the wafer at the above-described ion-implanted layer, and a step of forming an active layer of a predetermined thickness by thinning an active layer portion exposed by the delamination. In addition, a bonded wafer may be produced by so-called Smart-cut method (registered trademark).
A novel type of bonded wafer is proposed as a wafer used for semiconductor devices of the next generation exhibiting low electric power consumption. For example, Patent Reference 2 (Japanese Unexamined Patent Application, First Publication, No. 2000-36445) shows a bonded wafer in which an insulation layer is not interposed between the wafer for an active layer and the wafer for the substrate. This type of wafer is considered as an advantageous wafer in terms of the simplification of production process of a composite crystal substrate and improvement of performance of the substrate. In the method described in Patent Reference 2, after bonding the wafers having a natural oxide film, the wafer for the active layer is made into a thin layer. After that, the bonded wafer is subjected to a heat treatment, thereby forming a bonded interface in which an insulation film is not interposed.
However, in the bonded wafer produced by the above-described method of Patent Reference 2, there have been problems in that the natural oxide film in the bonded interface locally aggregated to form island oxides during the fabrication process of a bonded wafer and numerous island oxides remain in the bonded interface. The presence of these oxides causes a deterioration of device properties. In the production process of a semiconductor device, the island oxides behave as nuclei for defects, thereby causing reduction of yield, for example, because of unsatisfactory chips.
Patent Reference 3 (Japanese Unexamined Patent Application, First Publication No. H8-264398) describes a method for reducing island oxides (oxide islands) in the bonded interface. In this method, before bonding wafers, surface natural oxide films are removed from the wafers by dipping the wafers in a solution of HF or the like.
However the method of Patent Reference 3 includes problems. For example, even though the surface oxide film are removed from wafers oxygen atoms in the interior of the substrate locally condense to the bonded interface and form oxides. Therefore, the reduction of island oxides cannot be performed sufficiently.
An object of the invention is to provide a method of producing a bonded wafer by bonding a wafer for an active layer and a wafer for a substrate without interposing an insulation layer in between, where a formation of island oxides is suppressed by controlling oxygen concentrations in surface portions at least including bonded surfaces of the wafers.